Quantum Dot Qubit

The semiconductor industry has spent decades learning to fabricate transistors at nanometer scales with extraordinary precision and reproducibility. Quantum dot qubits ask whether that accumulated manufacturing knowledge can be redirected toward quantum computing. Instead of trapping ions in vacuum chambers or cooling superconducting circuits to millikelvin temperatures, a quantum dot qubit confines a single electron in a pocket of semiconductor material and uses its spin as the qubit. The appeal is obvious: leverage existing chip fabrication infrastructure rather than building from scratch.

The practical challenges are equally significant, but the progress over the past decade has been substantial enough that quantum dot qubits are now a serious contender in the hardware race.

The details

How quantum dots confine electrons. A quantum dot is a nanoscale region of semiconductor material surrounded by potential barriers. Voltages applied to nearby metallic gates shape these barriers, creating an electrostatic potential well. When the well is small and deep enough, it traps a single electron. The electron’s spin state, spin-up $|\uparrow\rangle$ or spin-down $|\downarrow\rangle$, serves as the qubit:

$|0\rangle \equiv |\uparrow\rangle, \quad |1\rangle \equiv |\downarrow\rangle$

Single-qubit gates are implemented using electron spin resonance: an oscillating magnetic field tuned to the electron’s Larmor frequency drives transitions between spin states. Two-qubit gates use the exchange interaction between electrons in adjacent dots, which is tunable by adjusting the barrier voltage between them.

GaAs quantum dots. The first quantum dot qubits were built in gallium arsenide (GaAs). GaAs has excellent electron mobility and was well understood from decades of heterostructure research. However, GaAs has a significant drawback: both Ga and As have non-zero nuclear spins. These nuclear spins create a fluctuating magnetic field (the Overhauser field) that dephases the electron spin qubit, limiting coherence times to microseconds even with advanced dynamical decoupling.

Silicon quantum dots. Silicon largely solves the nuclear spin problem. Natural silicon has about 4.7% of the spin-carrying isotope $^{29}$Si; the remaining 95.3% ($^{28}$Si and $^{30}$Si) have zero nuclear spin. Isotopically purified $^{28}$Si eliminates the Overhauser field almost entirely. Coherence times in $^{28}$Si quantum dots have exceeded 10 milliseconds, roughly a thousand times better than GaAs. Silicon is also the foundation of CMOS manufacturing, making it attractive for eventual scale-up.

Si/SiGe vs Si/SiO2 platforms. The two dominant silicon approaches differ in how the quantum dot is formed. Si/SiGe heterostructures grow a thin silicon layer between silicon-germanium alloys; the bandgap difference confines electrons to the silicon layer. Si/SiO2 devices use a silicon substrate with a thermally grown oxide barrier, similar to standard MOSFET manufacturing. Both approaches have achieved high single-qubit fidelities above 99.9% in research settings.

Companies and research groups. Intel is pursuing Si/SiGe quantum dot qubits with its Tunnel Falls chip, explicitly targeting CMOS-compatible fabrication. Silicon Quantum Computing (SQC) in Australia uses a different approach: placing phosphorus donor atoms in silicon with atomic precision using scanning tunneling microscopy, achieving extremely precise and reproducible qubit sites. QuTech at Delft also works on Si/SiGe spin qubits. Research groups at Princeton, UNSW Sydney, and CEA-Leti round out the major players.

Current state. As of 2026, research demonstrations have reached 6-qubit processors with two-qubit gate fidelities in the 98-99.5% range in leading labs. Arrays of 10 to 50 dots have been fabricated and partially operated. Intel has announced larger-scale chips in the 12-qubit range. Single-qubit fidelities are high; the remaining challenges are in two-qubit gates and scaling.

Challenges: charge noise. Quantum dot qubits are sensitive to charge noise: fluctuating electric fields from trapped charges in the oxide or substrate. Charge noise shifts the energy levels of the dot, which perturbs the qubit frequency and causes dephasing. Reducing charge noise requires cleaner materials, better interfaces, and operating at lower temperatures. It is the dominant obstacle to higher two-qubit gate fidelities in current devices.

Challenges: variability. Even with semiconductor fabrication precision, no two quantum dots are identical. Dot size, shape, and the exact position of nearby defects vary from device to device. This variability means that qubit frequencies differ across a chip, complicating control and calibration as arrays grow larger. Classical control electronics must be individually calibrated for each qubit, which scales poorly.

Challenges: classical control electronics. Each qubit requires multiple voltage lines for gate control, readout, and microwave drive. At millikelvin temperatures, the number of wires entering the dilution refrigerator becomes a bottleneck. Research groups are developing cryogenic CMOS control chips that can operate inside the refrigerator and multiplex control signals, but these add their own heat load and engineering complexity.

Comparison to other qubit types. Compared to superconducting qubits, quantum dot qubits are smaller (nanometers vs micrometers), potentially more scalable by fabrication, but currently less mature. Two-qubit gate speeds are similar (nanoseconds to microseconds), but superconducting qubits have a larger lead in system size and gate fidelity at scale. Compared to trapped ions, quantum dot qubits have shorter coherence times but much faster gate speeds and do not require a vacuum system.

Spin-orbit qubits and hole spin qubits. Beyond electron spin in silicon, researchers have explored related platforms. Hole spin qubits use the absence of an electron (a “hole”) in the valence band of germanium or silicon. Holes have strong intrinsic spin-orbit coupling, which enables electrically driven spin rotations without requiring oscillating magnetic fields, simplifying the control hardware. Ge/Si core-shell nanowires and planar germanium heterostructures have produced two-qubit gate fidelities above 99% in recent experiments, making hole-spin qubits a competitive alternative within the spin qubit family.

Readout methods. Reading out a quantum dot qubit typically uses spin-to-charge conversion. The spin state is mapped to a charge state (whether an electron tunnels out of the dot) using an energy-selective tunnel barrier. This charge state is then detected with a nearby charge sensor, often a quantum point contact or a radio-frequency single-electron transistor (rf-SET). Single-shot readout fidelities above 99.9% have been achieved in silicon devices. The readout process takes on the order of microseconds, which is fast relative to coherence times but still a potential bottleneck for error correction cycles requiring many repeated measurements.

Operating temperature. Conventional quantum dot spin qubits operate in dilution refrigerators at 10-50 millikelvin. A notable recent direction is “hot” spin qubits: devices that operate at 1-4 kelvin, where conventional cryogenic electronics can operate, dramatically simplifying the interface between quantum and classical hardware. Intel and other groups have demonstrated spin qubits at 1 kelvin with acceptable fidelities. If hot qubit operation can be maintained at scale, it removes one of the most significant engineering barriers to large-scale integration.

Why it matters for learners

Quantum dot qubits illustrate how platform choice involves tradeoffs across coherence, gate speed, fabrication scalability, and operating temperature. The semiconductor angle is also strategically important: if quantum dot qubits can be fabricated using modified CMOS processes, the economic and manufacturing barriers to scaling are qualitatively different from platforms that require entirely new supply chains.

For learners evaluating hardware roadmaps, understanding why silicon is attractive (nuclear spin environment, manufacturing compatibility) and what problems remain (charge noise, variability, control electronics) gives a grounded basis for interpreting company announcements.

The hot qubit direction is particularly worth following: if spin qubits can operate at 4 kelvin rather than 10 millikelvin, the cooling requirements drop dramatically and CMOS control circuits can operate in the same cryostat as the qubits, resolving the wiring bottleneck. This could be the development that makes large-scale semiconductor quantum processors practical well before other platforms achieve comparable scale.

Singlet-triplet qubits and exchange-only qubits. Not all quantum dot qubits encode information in a single-electron spin. Singlet-triplet qubits use two electrons in a double dot and encode in the singlet ($|\uparrow\downarrow\rangle - |\downarrow\uparrow\rangle$) and triplet ($|\uparrow\downarrow\rangle + |\downarrow\uparrow\rangle$) subspace. Exchange-only qubits use three electrons in three dots, encoding a logical qubit in the degenerate ground state of the exchange Hamiltonian. These variants trade single-qubit control complexity for different noise sensitivities and can be fully electrically controlled without oscillating magnetic fields, which matters for scaling.

Common misconceptions

Misconception 1: Semiconductor qubits are straightforwardly compatible with existing chip factories. The fabrication requirements for quantum dot qubits are much stricter than for classical transistors: isotopic purity, lower defect densities, and features at the few-nanometer scale with atomic-level precision. Existing fabs would require significant modifications and new process development. Compatibility is a long-term goal, not a present reality.

Misconception 2: High single-qubit fidelity means the system is ready to scale. Many quantum dot research groups report single-qubit fidelities above 99.9%. Two-qubit gate fidelities in the same devices are often lower (97-99%), and maintaining these fidelities across dozens of qubits simultaneously is substantially harder. Crosstalk, variability, and control overhead grow with system size in ways that single-qubit benchmarks do not capture.

Misconception 3: Silicon quantum dots and silicon classical transistors work the same way. A classical transistor uses many electrons. A quantum dot qubit uses exactly one, and exploits quantum properties (spin superposition, exchange coupling) that are deliberately destroyed in classical transistors through design. The fabrication goals overlap, but the physics and operating requirements are distinct.

See also

• Superconducting Qubit
• Trapped Ion
• Neutral Atoms
• Decoherence
• Quantum Error Correction